Low cost & High quality Color Demo Saicking Spurious Power Suppression VLSI Design For Real Time Video Applications

This project presents a low cost and high quality pipelined color demosaicking design using spurious power suppression technique. The main objective is to improve the quality of reconstructed images; a linear deviation compensation scheme was created to increase the correlation between the interpolated and neighboring pixels. Furthermore, immediately interpolated green color pixels are first to be used in hardware oriented color demosaicking algorithms, which efficiently promoted the quality of the reconstructed image. A boundary detector and a boundary mirror machine were added to improve the quality of pixels located in boundaries. In addition, a hardware sharing technique was used to reduce the hardware costs of three interpolators. By using the spurious power suppression technique the usage of power is minimized. Also the usage of adders and subtractors has been reduced. The gate counts and the core area have been greatly reduced using this technique.